#ifndef __RISCV64_CSR_H__
#define __RISCV64_CSR_H__

#define CSR_ADDR_MSTATUS		0x300
#define CSR_ADDR_MIE            0x304
#define CSR_ADDR_MTVEC          0x305
#define CSR_ADDR_MEPC           0x341
#define CSR_ADDR_MCAUSE         0x342
#define CSR_ADDR_MIP            0x344


#define CAUSE_MACHINE_ECALL 0xbUL
#define CAUSE_EBREAK 0x3UL
#define CAUSE_INVALID_INST 0x2UL

static inline word_t* csr_ptr(uint16_t csr_id) {
    switch (csr_id) {
        case CSR_ADDR_MSTATUS:   return &cpu.csr.mstatus.value;
        case CSR_ADDR_MIE:       return &cpu.csr.mie.value;
        case CSR_ADDR_MTVEC:     return &cpu.csr.mtvec.value;
        case CSR_ADDR_MEPC:      return &cpu.csr.mepc.value;
        case CSR_ADDR_MCAUSE:    return &cpu.csr.mcause.value;
        case CSR_ADDR_MIP:       return &cpu.csr.mip.value;
        default: assert(0);
    }
}

#define CSR(csr_id) (*csr_ptr(csr_id))

#endif
